Combines digital and analog circuit topologies. Explores Analog/Digital conversion and memory circuits. Includes modification, troubleshooting and analysis of circuits with a programmable logic device (PLD) using a hardware descriptive language (HDL), such as VHDL or Verilog. Prerequisite: EET 111 and EET 122. Audit available.  (For detailed information, see the Course Content and Outcome Guide ).

Credits:
5.00
Registration:
To register, you need the CRNs (ex. 22398) of your selected classes.
Fees:
Please note that for many courses, additional fees may apply.
Textbooks:
To find textbooks, you need the CRN, Campus, Term & Course Number (ex. BA101).
  CRN Campus / Bldg / Rm Time Days Dates
 
Linked Sections: Choose one section from each type below.
Lecture
27911 Sylvania Campus / SS / 114 01:00 PM-02:50 PM MW 30-Mar-2015 thru 10-Jun-2015
Instructor: David P Goldman
Tuition: credit Fees: $12.00
27912 Sylvania Campus / SS / 114 01:00 PM-02:50 PM TuTh 31-Mar-2015 thru 11-Jun-2015
Instructor: Reginald J Holmes
Tuition: credit Fees: $12.00
Lab
21074 Sylvania Campus / ST / 313 09:00 AM-11:50 AM Th 02-Apr-2015 thru 11-Jun-2015
Instructor: David P Goldman
Tuition: credit Fees: $0.00
22139 Sylvania Campus / ST / 313 09:00 AM-11:50 AM W 01-Apr-2015 thru 10-Jun-2015
Instructor: David P Goldman
Tuition: credit Fees: $0.00
22670 Sylvania Campus / ST / 316 12:00 PM-02:50 PM F 03-Apr-2015 thru 12-Jun-2015
Instructor: Reginald J Holmes
Tuition: credit Fees: $0.00