PCC/ CCOG / ENGR

Course Content and Outcome Guide for ENGR 275

Course Number:
ENGR 275
Course Title:
Microprocessor Systems
Credit Hours:
4
Lecture Hours:
30
Lecture/Lab Hours:
0
Lab Hours:
30
Special Fee:
$12.00

Course Description

Introduces X86 microprocessor architecture and assemble language programming for the IBM PC compatible computer, including the use of BIOS and DOS functions calls and the use of procedures. Structured programming techniques will be used to write programs that accept keyboard input and create displayed results. Appropriate program testing and debugging methods will be emphasized. Includes a 3-hour per week laboratory. Prerequisites/concurrent: ENGR 171. Audit available.

Intended Outcomes for the course

1. The student will be able to draw a block diagram of a simple computer consisting of a processor, RAM and ROM memory, ports, and the buses that interconnect these components

2. The student will be able to describe the instruction cycle (i.e., fetch/decode/execute) and relate the instruction cycle to what actions occur for various instruction types using a block diagram of a computer (see outcome #1)

3. The student will be able to draw a block diagram of an X86 processor showing the general purpose registers, the segment registers, the ALU, the flags register, the instruction pointer (IP) register, and the instruction register

4. The student will be able to describe how an X86 processor, operating in real mode, creates a physical address from a segment value and an offset

5. The student will be able to describe how a 16-bit word is accessed by an X86 processor from memory (i.e., in little endian order)

6. The student will be able to predict the memory locations accessed by a program given the segment value for the data segment and the offsets of the individual data structures

7. The student will be able to identify the five operand addressing modes available with X86 processors (i.e., immediate operands, register operands, direct addressing, register indirect addressing, register indirect addressing with displacement) and describe the use of each operand addressing mode

8. The student will be able to describe the formats used to store 8-bit and 16-bit unsigned and signed integer values

9. The student will be able to predict the value of the zero flag and carry flag after an arithmetic or logical instruction is executed by an X86 processor and be able to predict the value of the sign flag and overflow flag after an addition or subtraction instruction is executed by an X86 processor

10. The student will be able to describe the action of the following X86 assembly language instructions: MOV, INC, ADD, DEC, SUB, CMP, AND, OR, IN, OUT, JMP, CALL, RET, INT, PUSH, POP as well as the shift/rotate instructions, the string instructions, and the conditional jump instructions including JZ, JNZ, JE, JNE, JA, JAE, JB, JBE

11. The student will be able to translate the high-level language selection structure IF Þ THEN Þ ELSE Þ into X86 assembly language

12. The student will be able to translate each of the following high-level language iteration structures WHILE Þ DO Þ, REPEAT Þ UNTIL Þ, and FOR VAR = x TO y DO Þ into X86 assembly language

13. The student will be able to describe the purpose of a stack and be able to predict the contents of a stack and what the stack pointer (SP) is ´pointing to as a program is executed

14. The student will be able to write, test, and debug X86 assembly language programs that use BIOS and DOS function calls and procedures to process keyboard input in a specified manner and then generate displayable results

15. The student will be able to describe the actions performed by an X86 processor when a hardware interrupt occurs

16. The student will be able to write, test, and debug X86 interrupt service routines (ISRs) for timer tick interrupts and/or keyboard interrupts

17. The student will be able to describe the difference between X86 real mode and protected mode operation

Outcome Assessment Strategies


Assessment methods are to be determined by the instructor. Typically, in-class quizzes, exams and weekly homework assignments will be used. Laboratory assessment will be by program demonstration, code review, reports, and/or practical skills testing.

Course Content (Themes, Concepts, Issues and Skills)


1. Computer architecture from the perspective of a block diagram that includes a processor, RAM and ROM memory, ports, and the buses that interconnect these components

2. The ´instruction cycle (i.e., fetch/decode/execute) and specifically what actions occur for various instruction types using a block diagram of a computer (see #1)

3. The internal architecture of an X86 processor showing the general purpose registers, the segment registers, the ALU, the flags register, the instruction pointer (IP) register, and the instruction register

4. How an X86 processor, operating in real mode, creates a physical address from a segment value and an offset

5. How a 16-bit word is accessed by an X86 processor from memory (i.e., in little endian order)

6. Predicting the memory locations accessed by a program given the segment value for the data segment and the offsets of the individual data structures

7. The five operand addressing modes available with X86 processors (i.e., immediate operands, register operands, direct addressing, register indirect addressing, register indirect addressing with displacement) and describe the use of each operand addressing mode

8. The formats used to store 8-bit and 16-bit unsigned and signed integer values

9. The value of the zero flag and carry flag after an arithmetic or logical instruction is executed by an X86 processor and the value of the sign flag and overflow flag after an addition or subtraction instruction is executed by an X86 processor

10. The following X86 assembly language instructions: MOV, INC, ADD, DEC, SUB, CMP, AND, OR, IN, OUT, JMP, CALL, RET, INT, PUSH, POP as well as the shift/rotate instructions, the string instructions, and the conditional jump instructions including JZ, JNZ, JE, JNE, JA, JAE, JB, JBE

11. Translating the high-level language selection structure IF Þ THEN Þ ELSE Þ into X86 assembly language

12. Translating each of the following high-level language iteration structures WHILE Þ DO Þ, REPEAT Þ UNTIL Þ, and FOR VAR = x TO y DO Þ into X86 assembly language

13. The purpose of a stack and predicting the contents of a stack and what the stack pointer (SP) is pointing to as a program is executed

14. Writing, testing, and debugging X86 assembly language programs that use BIOS and DOS function calls and procedures to process keyboard input in a specified manner and then generate displayable results

15. The actions performed by an X86 processor when a hardware interrupt occurs

16. Writing, testing, and debugging X86 interrupt service routines (ISRs) for timer tick interrupts and/or keyboard interrupts

17. The difference between X86 real mode and protected mode operation

COMPETENCIES AND SKILLS:
The student will be able to:
1. Draw a block diagram of a simple computer consisting of a processor, RAM and ROM memory, ports, and the buses that interconnect these components

2. Describe the instruction cycle (i.e., fetch/decode/execute) and relate the instruction cycle to what actions occur for various instruction types using a block diagram of a computer (see #1)

3. Draw a block diagram of an X86 processor showing the general purpose registers, the segment registers, the ALU, the flags register, the instruction pointer (IP) register, and the instruction register

4. Describe how an X86 processor, operating in real mode, creates a physical address from a segment value and an offset

5. Describe how a 16-bit word is accessed by an X86 processor from memory (i.e., in little endian order)

6. Predict the memory locations accessed by a program given the segment value for the data segment and the offsets of the individual data structures

7. Identify the five operand addressing modes available with X86 processors (i.e., immediate operands, register operands, direct addressing, register indirect addressing, register indirect addressing with displacement) and describe the use of each operand addressing mode

8. Describe the formats used to store 8-bit and 16-bit unsigned and signed integer values

9. Predict the value of the zero flag and carry flag after an arithmetic or logical instruction is executed by an X86 processor and be able to predict the value of the sign flag and overflow flag after an addition or subtraction instruction is executed by an X86 processor

10. Describe the action of the following X86 assembly language instructions: MOV, INC, ADD, DEC, SUB, CMP, AND, OR, IN, OUT, JMP, CALL, RET, INT, PUSH, POP as well as the shift/rotate instructions, the string instructions, and the conditional jump instructions including JZ, JNZ, JE, JNE, JA, JAE, JB, JBE

11. Translate the high-level language selection structure IF Þ THEN Þ ELSE Þ into X86 assembly language

12. Translate each of the following high-level language iteration structures WHILE Þ DO Þ, REPEAT Þ UNTIL Þ, and FOR VAR = x TO y DO Þ into X86 assembly language

13. Describe the purpose of a stack and be able to predict the contents of a stack and what the stack pointer (SP) is pointing to as a program is executed

14. Write, test, and debug X86 assembly language programs that use BIOS and DOS function calls and procedures to process keyboard input in a specified manner and then generate displayable results

15. Describe the actions performed by an X86 processor when a hardware interrupt occurs

16. Write, test, and debug X86 interrupt service routines (ISRs) for timer tick interrupts and/or keyboard interrupts

17. Describe the difference between X86 real mode and protected mode operation