PCC/ CCOG / ENGR

Course Content and Outcome Guide for ENGR 271

Course Number:
ENGR 271
Course Title:
Digital Logic Design
Credit Hours:
5
Lecture Hours:
40
Lecture/Lab Hours:
30
Lab Hours:
0
Special Fee:
$12.00

Course Description

Introduces design and analysis of advanced digital systems. Covers development and integration of shift registers, memory, and programmable logic devices. Explores microprocessors, Digital Signal Processing, and/or integrated circuit technologies. Prerequisites: WR 115, RD 115 and MTH 20 or equivalent placement test scores.

Intended Outcomes for the course

Upon successful completion, students will be able to:

  1. Realize complex logic functions utilizing programmable logic.
  2. Design machines for the purpose of manipulating data streams.
  3. Design complex digital systems.

Course Activities and Design

Course activities will include lecture presentations, coordinated homework and laboratory assignments, and examinations.

Outcome Assessment Strategies

Student evaluation includes examinations, laboratory assignments, homework assignments, and a final comprehensive examination. Specific evaluation procedures will be discussed during the first class meeting.

Course Content (Themes, Concepts, Issues and Skills)

Instructional Goals: To learn the logic and timing characteristics of shift registers.
Objectives:

1. Shift Registers

1.1 Identify the basic forms of data movement in shift registers.
1.2 Explain how serial in/serial out, serial?in/parallel?out, parallel?in/serial?out, and parallel?in/parallel?out shift registers operate.
1.3 Describe how a bidirectional shift register operates.
1.4 For each of the aforementioned shift register types, draw the output waveforms produced by given input waveforms.
1.5 Explain how shift register counters operate (Johnson and ring) and determine the output waveforms produced.

Instructional Goals: To study the use of programmable logic devices commonly used to implement combinational logic functions.
Objectives:

2. Programmable Logic Software

2.1 Describe the internal structures of PROMs, FPLAs and PALs.
2.2 Given the logic diagram for a PAL, determine the equation for the logic function being implemented.
2.3 Draw the fuse map needed to implement a simple function with a PAL.
2.4 Use a PAL data sheet to determine the device needed to implement a specified logic function.
2.5 Use a programmable logic software program such as ABEL to develop a fuse map which implements a combinational logic function in a PAL.
2.6 Program a PAL and verify its operation.
2.7 Introduction to Verilog.
 

Instructional Goals: To learn the basic elements of a microprocessor .
Objectives:

3. Introduction to Computers

3.1 Name the basic units of a computer
3.2 Name the basic elements of a microprocessor
3.3 Discuss multi?core processors
3.4 Explain pipelining, multi?tasking, and multi?threading
3.5 Explain the basic architecture of the Intel microprocessor
3.6 Explain the multiplexed bus operation of the Intel Pentium processors
3.7 Describe a simple assembly language program
3.8 Describe the seven instruction groups for the Intel processors
3.9 Distinguish between assembly language and machine language
3.10 Compare polled I/O, interrupt?driven I/O, and software interrupts
3.11 Define and explain the advantages of DMA

Instructional Goals: To learn the basics concepts of digital signal processing.
Objectives:

4. Introduction to Digital Signal Processing

4.1 Sampling Theory and Purpose of Filtering
4.2 Digital?to?Analog Conversion
4.3 Analog?to?Digital Conversion
4.4 Explain the essential elements of a digital signal processing system
4.5 Explain the basic concepts of a digital signal processor
4.6 Describe the basic architecture of a DSP
4.7 Describe some of the functions that a DSP performs

Instructional Goals: To learn the basic concepts of integrated circuit technology .
Objectives:

5. Integrated Circuit Technologies

5.1 Basic Operational Characteristics and Parameters
5.2 CMOS Circuits
5.3 TTL Circuits
5.4 Practical Considerations in the Use of TTL
5.5 Comparison of CMOS and TTL Performance
5.6 Emitter?Coupled Logic (ECL)
5.7 PMOS, NMOS, and E2CMOS